1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same and, more particularly, to, for example, a stacked transistor having a structure in which a floating gate electrode and a control gate electrode are provided through an inter-electrode insulating film and a method of manufacturing the same.
2. Description of the Related Art
A nonvolatile semiconductor storage device using a transistor having a structure in which a floating gate electrode, an inter-electrode insulating film, and a control gate electrode are stacked is known. By using such a transistor as a memory cell and connecting a plurality of such memory cells in series, a NAND cell string of a so-called NAND flash memory is constituted.
An attempt is made to reduce the resistance value of the control gate electrode by using a metallic silicide film in a part of an electrode film serving as a control gate electrode of the NAND flash memory. Turning an electrode film into a metallic silicide film is performed by depositing a metallic film for constituting a metallic silicide film on a top surface of an electrode film constituted of polysilicon, and heating the polysilicon film and the metallic film. As a result of this, metallic atoms diffuse into the polysilicon film, and react with the polysilicon, thereby forming a metallic silicide film.
Recently, as a result of turning a control gate electrode film into a metallic silicide film, following phenomena have been confirmed. That is, the phenomena are an increase in the resistance value of a control gate electrode, an increase in the variation in the resistance value of a control gate electrode in a memory cell area, progress in deterioration of a control gate electrode caused by an increase in agglomeration, and the like. Incidentally, agglomeration implies a phenomenon in which metallic atoms move because of formation of crystal grains.
These phenomena are assumed to be due to progress in micronization of a semiconductor device. The phenomena will be described below. With the pursuit of micronization of the semiconductor storage device, sizes of parts in the semiconductor storage device continue becoming smaller. With the micronization, a width of a control gate electrode becomes narrower, thereby increasing an aspect ratio (ratio of a height to a width) of the control gate electrode.
An increase in the aspect ratio of the control gate electrode makes it necessary to form a metallic silicide film having a high aspect ratio. As described above, when a metallic silicide film is formed, metallic atoms diffuse into the polysilicon film from a metallic element film provided on the polysilicon film. That is, the metallic atoms diffuse in the film thickness direction of the polysilicon film. Accordingly, the volume of the polysilicon to be turned into the metallic silicide is determined in accordance with the degree of diffusion of the metallic atoms. In order to equalize characteristics among memory cells, it is desirable that the volume of the polysilicon to be turned into the metallic silicide be uniform among the control gate electrodes. That is, it is necessary to appropriately control diffusion of the metallic atoms in the film thickness direction of the control gate electrode. However, in general, the deeper the region of the polysilicon film desired to be turned into the metallic silicide becomes in the depth direction of the polysilicon film, the more difficult control of the diffusion length of the metallic atoms becomes. For this reason, an increase in the aspect ratio of the control gate electrode described above causes the diffusion length of the metallic atoms to largely vary among the control gate electrodes. As a result, an increase in the resistance value of a control gate electrode, an increase in the variation in the resistance value of a control gate electrode among cells, progress in deterioration of a control gate electrode caused by an increase in agglomeration, and the like described above occur.
An example is disclosed in U.S. Pat. No. 7,012,295 and U.S. Pat. No. 7,122,430 (Both are based on Jpn. Pat. Appln. KOKAI Publication No. 2005-26589) in which a control gate of a memory cell and a selection transistor and a diffusion layer of the selection transistor are turned into the silicide.